// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  hipciec_top_reg_c_union_define.h
// Project line  :  Platform And Key Technologies Development
// Department    :  CAD Development Department
// Author        :  xxx
// Version       :  1.0
// Date          :  2017/10/24
// Description   :  The description of xxx project
// Others        :  Generated automatically by nManager V4.2 
// History       :  xxx 2018/03/16 18:02:59 Create file
// ******************************************************************************

#ifndef __HIPCIEC_TOP_REG_C_UNION_DEFINE_H__
#define __HIPCIEC_TOP_REG_C_UNION_DEFINE_H__

/* Define the union U_PCIE_INT_SET */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_0           : 14  ; /* [31:18] */
        unsigned int    hipciec_int_set : 18  ; /* [17:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_INT_SET;

/* Define the union U_PCIE_INT_MSK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_1            : 14  ; /* [31:18] */
        unsigned int    hipciec_int_mask : 18  ; /* [17:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_INT_MSK;

/* Define the union U_PCIE_INT_RO */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_2          : 14  ; /* [31:18] */
        unsigned int    hipciec_int_ro : 18  ; /* [17:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_INT_RO;

/* Define the union U_PCIE_INT_STATUS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_3           : 14  ; /* [31:18] */
        unsigned int    hipciec_int_ind : 18  ; /* [17:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_INT_STATUS;

/* Define the union U_APB_WR_LAST_ADD */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    apb_last_waddr : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_APB_WR_LAST_ADD;

/* Define the union U_APB_WR_TIMES */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_4        : 22  ; /* [31:10] */
        unsigned int    apb_wr_times : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_APB_WR_TIMES;

/* Define the union U_APB_TIMER_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_5                        : 4  ; /* [31:28] */
        unsigned int    apb_timeout_interval         : 22  ; /* [27:6] */
        unsigned int    apb_timeout_interval_low_bit : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_APB_TIMER_CTRL;

/* Define the union U_APB_TIMEOUT_INFO */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    apb_timeout_int_info : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_APB_TIMEOUT_INFO;

/* Define the union U_IEP_DMA_AXI_USER */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_6          : 7  ; /* [31:25] */
        unsigned int    cfg_dma_axuser : 25  ; /* [24:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_IEP_DMA_AXI_USER;

/* Define the union U_IEP_SDI0_AXI_USER */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_7           : 7  ; /* [31:25] */
        unsigned int    cfg_sdi0_axuser : 25  ; /* [24:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_IEP_SDI0_AXI_USER;

/* Define the union U_IEP_SDI1_AXI_USER */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_8           : 7  ; /* [31:25] */
        unsigned int    cfg_sdi1_axuser : 25  ; /* [24:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_IEP_SDI1_AXI_USER;

/* Define the union U_APB_TIME_OUT_NUM */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_9           : 24  ; /* [31:8] */
        unsigned int    apb_timeout_num : 8  ; /* [7:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_APB_TIME_OUT_NUM;

/* Define the union U_AP_REGIF_DFX */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_10                  : 8  ; /* [31:24] */
        unsigned int    fifo_full_apb_oper_req  : 8  ; /* [23:16] */
        unsigned int    fifo_full_apb_oper_quit : 8  ; /* [15:8] */
        unsigned int    rsv_11                  : 8  ; /* [7:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_AP_REGIF_DFX;

/* Define the union U_AP_REGIF_DFX1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_12    : 19  ; /* [31:13] */
        unsigned int    rfifo_cnt : 5  ; /* [12:8] */
        unsigned int    rsv_13    : 3  ; /* [7:5] */
        unsigned int    wfifo_cnt : 5  ; /* [4:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_AP_REGIF_DFX1;

/* Define the union U_AP_SFT_RST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_14      : 31  ; /* [31:1] */
        unsigned int    axi_sft_rst : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_AP_SFT_RST;

/* Define the union U_AP_PORT_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_15     : 12  ; /* [31:20] */
        unsigned int    port_valid : 20  ; /* [19:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_AP_PORT_EN;

/* Define the union U_PCIE_SPI1_INT_SET */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_16               : 21  ; /* [31:11] */
        unsigned int    hipciec_spi1_int_set : 11  ; /* [10:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_SPI1_INT_SET;

/* Define the union U_PCIE_SPI1_INT_MSK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_17                : 21  ; /* [31:11] */
        unsigned int    hipciec_spi1_int_mask : 11  ; /* [10:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_SPI1_INT_MSK;

/* Define the union U_PCIE_SPI1_INT_RO */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_18              : 21  ; /* [31:11] */
        unsigned int    hipciec_spi1_int_ro : 11  ; /* [10:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_SPI1_INT_RO;

/* Define the union U_PCIE_SPI1_INT_STATUS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_19               : 21  ; /* [31:11] */
        unsigned int    hipciec_spi1_int_ind : 11  ; /* [10:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_SPI1_INT_STATUS;

/* Define the union U_PCIE_INT_SPI0_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_20                    : 13  ; /* [31:19] */
        unsigned int    core_busi_int_spi0_en     : 3  ; /* [18:16] */
        unsigned int    rsv_21                    : 1  ; /* [15] */
        unsigned int    core_abnormal_int_spi0_en : 3  ; /* [14:12] */
        unsigned int    rsv_22                    : 3  ; /* [11:9] */
        unsigned int    ap_int_spi0_en            : 1  ; /* [8] */
        unsigned int    rsv_23                    : 1  ; /* [7] */
        unsigned int    pcs_int_spi0_en           : 3  ; /* [6:4] */
        unsigned int    rsv_24                    : 3  ; /* [3:1] */
        unsigned int    apb_timeout_int_spi0_en   : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_INT_SPI0_EN;

/* Define the union U_PCIE_DMA_MSI_DFX0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    iep_dma_msi_info0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_DMA_MSI_DFX0;

/* Define the union U_PCIE_DMA_MSI_DFX1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    iep_dma_msi_info1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_DMA_MSI_DFX1;

/* Define the union U_PCIE_DMA_MSI_DFX2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    iep_dma_msi_info2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_DMA_MSI_DFX2;

/* Define the union U_PCIE_DMA_MSI_DFX3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    iep_dma_msi_info3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_DMA_MSI_DFX3;

/* Define the union U_PCIE_SDI0_MSI_DFX0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    iep_sdi0_msi_info0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_SDI0_MSI_DFX0;

/* Define the union U_PCIE_SDI0_MSI_DFX1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    iep_sdi0_msi_info1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_SDI0_MSI_DFX1;

/* Define the union U_PCIE_SDI0_MSI_DFX2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    iep_sdi0_msi_info2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_SDI0_MSI_DFX2;

/* Define the union U_PCIE_SDI0_MSI_DFX3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    iep_sdi0_msi_info3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_SDI0_MSI_DFX3;

/* Define the union U_PCIE_DMA_INT_MAPPING */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    dma_int_mapping : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PCIE_DMA_INT_MAPPING;


//==============================================================================
/* Define the global struct */
typedef struct
{
    volatile U_PCIE_INT_SET         PCIE_INT_SET         ; /* 0 */
    volatile U_PCIE_INT_MSK         PCIE_INT_MSK         ; /* 4 */
    volatile U_PCIE_INT_RO          PCIE_INT_RO          ; /* 8 */
    volatile U_PCIE_INT_STATUS      PCIE_INT_STATUS      ; /* C */
    volatile U_APB_WR_LAST_ADD      APB_WR_LAST_ADD      ; /* 10 */
    volatile U_APB_WR_TIMES         APB_WR_TIMES         ; /* 14 */
    volatile U_APB_TIMER_CTRL       APB_TIMER_CTRL       ; /* 18 */
    volatile U_APB_TIMEOUT_INFO     APB_TIMEOUT_INFO     ; /* 1C */
    volatile U_IEP_DMA_AXI_USER     IEP_DMA_AXI_USER     ; /* 2C */
    volatile U_IEP_SDI0_AXI_USER    IEP_SDI0_AXI_USER    ; /* 30 */
    volatile U_IEP_SDI1_AXI_USER    IEP_SDI1_AXI_USER    ; /* 34 */
    volatile U_APB_TIME_OUT_NUM     APB_TIME_OUT_NUM     ; /* 38 */
    volatile U_AP_REGIF_DFX         AP_REGIF_DFX         ; /* 3C */
    volatile U_AP_REGIF_DFX1        AP_REGIF_DFX1        ; /* 40 */
    volatile U_AP_SFT_RST           AP_SFT_RST           ; /* 44 */
    volatile U_AP_PORT_EN           AP_PORT_EN           ; /* 48 */
    volatile U_PCIE_SPI1_INT_SET    PCIE_SPI1_INT_SET    ; /* 4C */
    volatile U_PCIE_SPI1_INT_MSK    PCIE_SPI1_INT_MSK    ; /* 50 */
    volatile U_PCIE_SPI1_INT_RO     PCIE_SPI1_INT_RO     ; /* 54 */
    volatile U_PCIE_SPI1_INT_STATUS PCIE_SPI1_INT_STATUS ; /* 58 */
    volatile U_PCIE_INT_SPI0_EN     PCIE_INT_SPI0_EN     ; /* 5C */
    volatile U_PCIE_DMA_MSI_DFX0    PCIE_DMA_MSI_DFX0    ; /* 60 */
    volatile U_PCIE_DMA_MSI_DFX1    PCIE_DMA_MSI_DFX1    ; /* 64 */
    volatile U_PCIE_DMA_MSI_DFX2    PCIE_DMA_MSI_DFX2    ; /* 68 */
    volatile U_PCIE_DMA_MSI_DFX3    PCIE_DMA_MSI_DFX3    ; /* 6C */
    volatile U_PCIE_SDI0_MSI_DFX0   PCIE_SDI0_MSI_DFX0   ; /* 70 */
    volatile U_PCIE_SDI0_MSI_DFX1   PCIE_SDI0_MSI_DFX1   ; /* 74 */
    volatile U_PCIE_SDI0_MSI_DFX2   PCIE_SDI0_MSI_DFX2   ; /* 78 */
    volatile U_PCIE_SDI0_MSI_DFX3   PCIE_SDI0_MSI_DFX3   ; /* 7C */
    volatile U_PCIE_DMA_INT_MAPPING PCIE_DMA_INT_MAPPING ; /* 80 */

} S_hipciec_top_reg_REGS_TYPE;

/* Declare the struct pointor of the module hipciec_top_reg */
extern volatile S_hipciec_top_reg_REGS_TYPE *gophipciec_top_regAllReg;

/* Declare the functions that set the member value */
int iSetPCIE_INT_SET_hipciec_int_set(unsigned int uhipciec_int_set);
int iSetPCIE_INT_MSK_hipciec_int_mask(unsigned int uhipciec_int_mask);
int iSetPCIE_INT_RO_hipciec_int_ro(unsigned int uhipciec_int_ro);
int iSetPCIE_INT_STATUS_hipciec_int_ind(unsigned int uhipciec_int_ind);
int iSetAPB_WR_LAST_ADD_apb_last_waddr(unsigned int uapb_last_waddr);
int iSetAPB_WR_TIMES_apb_wr_times(unsigned int uapb_wr_times);
int iSetAPB_TIMER_CTRL_apb_timeout_interval(unsigned int uapb_timeout_interval);
int iSetAPB_TIMER_CTRL_apb_timeout_interval_low_bit(unsigned int uapb_timeout_interval_low_bit);
int iSetAPB_TIMEOUT_INFO_apb_timeout_int_info(unsigned int uapb_timeout_int_info);
int iSetIEP_DMA_AXI_USER_cfg_dma_axuser(unsigned int ucfg_dma_axuser);
int iSetIEP_SDI0_AXI_USER_cfg_sdi0_axuser(unsigned int ucfg_sdi0_axuser);
int iSetIEP_SDI1_AXI_USER_cfg_sdi1_axuser(unsigned int ucfg_sdi1_axuser);
int iSetAPB_TIME_OUT_NUM_apb_timeout_num(unsigned int uapb_timeout_num);
int iSetAP_REGIF_DFX_fifo_full_apb_oper_req(unsigned int ufifo_full_apb_oper_req);
int iSetAP_REGIF_DFX_fifo_full_apb_oper_quit(unsigned int ufifo_full_apb_oper_quit);
int iSetAP_REGIF_DFX1_rfifo_cnt(unsigned int urfifo_cnt);
int iSetAP_REGIF_DFX1_wfifo_cnt(unsigned int uwfifo_cnt);
int iSetAP_SFT_RST_axi_sft_rst(unsigned int uaxi_sft_rst);
int iSetAP_PORT_EN_port_valid(unsigned int uport_valid);
int iSetPCIE_SPI1_INT_SET_hipciec_spi1_int_set(unsigned int uhipciec_spi1_int_set);
int iSetPCIE_SPI1_INT_MSK_hipciec_spi1_int_mask(unsigned int uhipciec_spi1_int_mask);
int iSetPCIE_SPI1_INT_RO_hipciec_spi1_int_ro(unsigned int uhipciec_spi1_int_ro);
int iSetPCIE_SPI1_INT_STATUS_hipciec_spi1_int_ind(unsigned int uhipciec_spi1_int_ind);
int iSetPCIE_INT_SPI0_EN_core_busi_int_spi0_en(unsigned int ucore_busi_int_spi0_en);
int iSetPCIE_INT_SPI0_EN_core_abnormal_int_spi0_en(unsigned int ucore_abnormal_int_spi0_en);
int iSetPCIE_INT_SPI0_EN_ap_int_spi0_en(unsigned int uap_int_spi0_en);
int iSetPCIE_INT_SPI0_EN_pcs_int_spi0_en(unsigned int upcs_int_spi0_en);
int iSetPCIE_INT_SPI0_EN_apb_timeout_int_spi0_en(unsigned int uapb_timeout_int_spi0_en);
int iSetPCIE_DMA_MSI_DFX0_iep_dma_msi_info0(unsigned int uiep_dma_msi_info0);
int iSetPCIE_DMA_MSI_DFX1_iep_dma_msi_info1(unsigned int uiep_dma_msi_info1);
int iSetPCIE_DMA_MSI_DFX2_iep_dma_msi_info2(unsigned int uiep_dma_msi_info2);
int iSetPCIE_DMA_MSI_DFX3_iep_dma_msi_info3(unsigned int uiep_dma_msi_info3);
int iSetPCIE_SDI0_MSI_DFX0_iep_sdi0_msi_info0(unsigned int uiep_sdi0_msi_info0);
int iSetPCIE_SDI0_MSI_DFX1_iep_sdi0_msi_info1(unsigned int uiep_sdi0_msi_info1);
int iSetPCIE_SDI0_MSI_DFX2_iep_sdi0_msi_info2(unsigned int uiep_sdi0_msi_info2);
int iSetPCIE_SDI0_MSI_DFX3_iep_sdi0_msi_info3(unsigned int uiep_sdi0_msi_info3);
int iSetPCIE_DMA_INT_MAPPING_dma_int_mapping(unsigned int udma_int_mapping);

#endif // __HIPCIEC_TOP_REG_C_UNION_DEFINE_H__
